Computer Engineering
Course Details
KTO KARATAY UNIVERSITY
Mühendislik ve Doğa Bilimleri Fakültesi
Programme of Computer Engineering
Course Details
Mühendislik ve Doğa Bilimleri Fakültesi
Programme of Computer Engineering
Course Details
| Course Code | Course Name | Year | Period | Semester | T+A+L | Credit | ECTS |
|---|---|---|---|---|---|---|---|
| 05060006 | Computer Organization | 3 | Spring | 6 | 3+0+0 | 3 | 5 |
| Course Type | Compulsory |
| Course Cycle | Bachelor's (First Cycle) (TQF-HE: Level 6 / QF-EHEA: Level 1 / EQF-LLL: Level 6) |
| Course Language | Turkish |
| Methods and Techniques | - |
| Mode of Delivery | Face to Face |
| Prerequisites | - |
| Coordinator | - |
| Instructor(s) | Assoc. Prof. Ali ÖZTÜRK |
| Instructor Assistant(s) | - |
Course Instructor(s)
| Name and Surname | Room | E-Mail Address | Internal | Meeting Hours |
|---|---|---|---|---|
| Assoc. Prof. Ali ÖZTÜRK | A-127 | [email protected] | 0 | Thursday 14.00-15.00 |
Course Content
Temel bilgisayar organizasyonu ve tasarımı. Talimat getirme, kod çözme ve yürütme döngüleri. Aritmetik ve mantık işlemleri ve aritmetik mantık biriminin tasarımı. CPU organizasyonu Öğretim formatları ve adresleme modları. Kablolu ve mikroprogramlı kontrol organizasyonu. Bellek organizasyonu: statik ve dinamik anılar ve hafıza tasarımı, sanal bellek, önbellek ve yönetimi. Giriş-Çıkış organizasyonu: arayüzey işlemciler ve çevre birimleri. Performans iyileştirmeleri için borulama ve diğer teknikler. Makine dili ve montaj dili.
Objectives of the Course
After successfully completing this course, students will be able to describe the major components of a computer system and their relationship. They will understand how a CPU is organized, and how such techniques as pipelining improve the performance of a CPU. They will understand the idea of a memory hierarchy, and be understand particularly its use in memory caches and virtual memory. Students will understand how a CPU communicates with peripheral devices.
Contribution of the Course to Field Teaching
| Basic Vocational Courses | X |
| Specialization / Field Courses | X |
| Support Courses | |
| Transferable Skills Courses | |
| Humanities, Communication and Management Skills Courses |
Relationships between Course Learning Outcomes and Program Outcomes
| Relationship Levels | ||||
| Lowest | Low | Medium | High | Highest |
| 1 | 2 | 3 | 4 | 5 |
| # | Program Learning Outcomes | Level |
|---|---|---|
| P2 | Ability to identify, formulate, and solve complex engineering problems; ability to select and apply appropriate analysis and modeling methods for this purpose | 5 |
| P3 | Ability to design a complex system, process, device or product to meet specific requirements under realistic constraints and conditions; ability to apply modern design methods for this purpose | 5 |
Course Learning Outcomes
| Upon the successful completion of this course, students will be able to: | |||
|---|---|---|---|
| No | Learning Outcomes | Outcome Relationship | Measurement Method ** |
| O1 | Writing control algorithms on microprocessors. | P.3.4 | 1,7 |
| O2 | Knowledge of processor structure and operating logic. | P.3.21 | 1,7 |
| O3 | Knowledge of the basic elements of the computer and microprocessor and how to choose the right component. | P.2.19 | 1,7 |
| ** Written Exam: 1, Oral Exam: 2, Homework: 3, Lab./Exam: 4, Seminar/Presentation: 5, Term Paper: 6, Application: 7 | |||
Weekly Detailed Course Contents
| Week | Topics |
|---|---|
| 1 | Introduction |
| 2 | Basic computer organization and design |
| 3 | Instruction fetch, decode and execution cycles |
| 4 | Arithmetic and logic operations and design of arithmetic logic unit |
| 5 | CPU organization |
| 6 | Instruction formats and addressing modes |
| 7 | Hardwired and microprogrammed control organization |
| 8 | Memory organization: static and dynamic memories and memory design, virtual-memory, caches and their management |
| 9 | Input-Output organization: interfacing processors and peripherals |
| 10 | Pipelining and other techniques for performance improvements |
| 11 | Machine language and assembly language |
| 12 | Applications |
Textbook or Material
| Resources | Computer Organization and Architecture by William Stallings, Prentice Hall, (2002) |
Evaluation Method and Passing Criteria
| In-Term Studies | Quantity | Percentage |
|---|---|---|
| Attendance | - | - |
| Laboratory | - | - |
| Practice | - | - |
| Course Specific Internship (If Any) | - | - |
| Homework | - | - |
| Presentation | - | - |
| Projects | - | - |
| Quiz | - | - |
| Midterms | 1 | 40 (%) |
| Final Exam | 1 | 60 (%) |
| Total | 100 (%) | |
ECTS / Working Load Table
| Quantity | Duration | Total Work Load | |
|---|---|---|---|
| Course Week Number and Time | 14 | 3 | 42 |
| Out-of-Class Study Time (Pre-study, Library, Reinforcement) | 14 | 3 | 42 |
| Midterms | 1 | 33 | 33 |
| Quiz | 0 | 0 | 0 |
| Homework | 0 | 0 | 0 |
| Practice | 0 | 0 | 0 |
| Laboratory | 0 | 0 | 0 |
| Project | 0 | 0 | 0 |
| Workshop | 0 | 0 | 0 |
| Presentation/Seminar Preparation | 0 | 0 | 0 |
| Fieldwork | 0 | 0 | 0 |
| Final Exam | 1 | 33 | 33 |
| Other | 0 | 0 | 0 |
| Total Work Load: | 150 | ||
| Total Work Load / 30 | 5 | ||
| Course ECTS Credits: | 5 | ||
Course - Learning Outcomes Matrix
| Relationship Levels | ||||
| Lowest | Low | Medium | High | Highest |
| 1 | 2 | 3 | 4 | 5 |
| # | Learning Outcomes | P2 | P3 |
|---|---|---|---|
| O1 | Knowledge of the basic elements of the computer and microprocessor and how to choose the right component. | 2 | 3 |
| O2 | Writing control algorithms on microprocessors. | 1 | 4 |
| O3 | Knowledge of processor structure and operating logic. | 5 | 2 |